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Overview
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Development Resources
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Application
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Ordering Detail
Overview
The TPT29641 is a 2-channel I2C bus master demultiplexer with an arbiter function. It allows masters without arbitration logic to share resources. The system maintains normal operation even when two masters issue their commands at the same time. The winning master gains control of the bus, while the losing master will wait to acquire control only after the winner releases the bus or when the reserve time expires. The TPT29641 also supports a master initiating requests and waiting while the other master retains control of the bus.
The TPT29641 supports hardware reset via an active-low RESET pin and software reset through the I2C bus. The device features two interrupt outputs (INT0 and INT1) and one interrupt input (INT_IN) to indicate bus control status, shared mailbox status, and downstream interrupt status. All interrupts can be disabled if the masking option is set.
The TPT29641 operates from 2.3 V to 3.6 V. The pass gates of the switches are constructed so that the VDD terminal can be used to limit the maximum high voltage. It allows voltage level translation between 1.8-V, 2.3-V, 2.5-V, 3.3-V, and 3.6-V buses without any additional component. The TPT29641 does not isolate the capacitance on either side of the device. Pull-up resistors must be placed on all channels.
The TPT29641 is available in TSSOP16 and QFN3×3-16 packages, and is characterized from −40°C to +85°C.
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Status
Production
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Rating
Industrial
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Drivers Per Package
2
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Receivers Per Package
1
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VCC (Min) (V)
2.3
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VCC (Max) (V)
3.6
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Data Rate (Max) (kBPS)
1000
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ICC (Max) (mA)
0.32
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ESD HBM (kV)
7
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IEC-61000-4-2 Contact (kV)
/
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Operating Temperature Range (℃)
-40 to +85
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Package
TSSOP16, QFN3X3-16
Development Resources
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Documentation
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Show FilterHidden FilterDocumentation
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Data Sheet
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Selection Guide
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Newsletter
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Application Note
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Technical Note
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User Guide
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Test Report
- Document Name
- Type
- Language
- Date
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Selection GuideEnglish07/02/2025
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Data SheetEnglish01/27/2026
2-channel I2C-bus Master Arbiter
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Technical NoteEnglish01/19/2024
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Technical NoteEnglish01/19/2024
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Technical NoteEnglish01/19/2024
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Application
• High Reliability Systems with Dual Masters
• Allows Masters without Arbitration Logic to Share Resources
• Servers/Storages
• Routers (Telecom Switching Equipment)
• Personal Computers/Consumer Handsets
Ordering Detail
| Order Part Number | Buy | Samples | Rating | Feature | Status | 1ku Price | Release Date | Package | Lead time (week) | MSL | Packing | MPQ | CPQ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| TPT29641-TS3R | Industrial Grade | / | Production | / | 2026-01-26 | TSSOP16 | 24 | MSL3 | T&R | 3000 | 15000 | ||
| TPT29641-QFNR | Industrial Grade | / | Production | / | 2026-01-27 | QFN3X3-16 | 24 | MSL3 | T&R | 4000 | 20000 |
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