3PD5651E
High-speed, 10-Bit, 125MSPS, CMOS Digital-to-Analog Converter
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Development Resources
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Overview
The 3PD5651E offers exceptional AC and DC performance while supporting update rates up to 125 MSPS. The 3PD5651E’s flexible single-supply operating range of +2.7V to +5.5V and low power dissipation are well suited for portable and low power applications. Its power dissipation can be further reduced to 45mW, without a significant degradation in performance, by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 20mW.
The 3PD5651E is manufactured on an advanced CMOS process. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution. Flexible supply options support +3V and +5V CMOS logic families.
The 3PD5651E is a current-output DAC with a nominal full-scale output current of 20mA and > 100kΩ output impedance.
Differential current outputs are provided to support single-ended or differential applications. The current outputs may be directly tied to an output resistor to provide two complementary, single-ended voltage outputs. The output voltage compliance range is 1.25V.
The 3PD5651E contains a 1.10V on-chip reference and reference control amplifier, which allows the full-scale output current to be simply set by a single resistor. The 3PD5651E can be driven by a variety of external reference voltages.
The 3PD5651E’s full-scale current can be adjusted over a 2mA to 20mA range without any degradation in dynamic performance. Thus, the 3PD5651E may operate at reduced power levels or be adjusted over a 20dB range to provide additional gain ranging capabilities.
The 3PD5651E is available in 28-Lead TSSOP package. It is specified for operation over the industrial temperature range.
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Status
Production
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Rating
Industrial
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CH
1
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Resolution
10
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Update Rate (MSPS)
125
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Interface
Internal, 1.10V
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Output
0.5
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SNR (dB)
0.25
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VDD (V)
79
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Reference
2.7~5.5
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Package
TSSOP28
Development Resources
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Documentation
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Show FilterHidden FilterDocumentation
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Data Sheet
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Selection Guide
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Newsletter
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Application Note
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Technical Note
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User Guide
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Test Report
- Document Name
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- Language
- Date
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Selection GuideEnglish03/06/2026
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Data SheetEnglish02/02/2024
High-speed, 10-Bit, 125MSPS, CMOS Digital-to-Analog Converter
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Technical NoteEnglish01/19/2024
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Technical NoteEnglish01/19/2024
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Technical NoteEnglish01/19/2024
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Application
• Communications Transmit Channel
• Signal Reconstruction
• Direct Digital Synthesis (DDS)
• Instrumentation
• Video Reconstruction
Ordering Detail
| Order Part Number | Buy | Samples | Rating | Feature | Status | 1ku Price | Package | Lead time (week) | MSL | Packing | MPQ | CPQ |
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