Overview
With the development of main processors in PCs and servers, more and more source double-data-rate (DDR) memories are required in the mainboard, where the input voltage becomes lower and lower, and space limitation becomes higher and higher.
The TPL51201 series devices are 3-A sink and source DDR termination regulators specifically designed for the DDR applications with heavy space limitation. The TPL51201 series devices implement a fast load-transient response and only requires a minimum output capacitance of 20 μF.
The TPL51201 series devices support a remote-sensing function and all power requirements for DDR VTT bus termination. In addition, the TPL51201 series devices provide an open-drain PG signal for VTT regulation indication and an EN signal that can be used to discharge VTT for DDR applications.
The TPL51201 series devices are available in the thermally efficient 10-pin 3×3 DFN package with thermal pad, and support the operating temperature range from –40°C to +125°C.
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Status
Production
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Rating
Industrial
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Input Voltage (min) (V)
2.375
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Input Voltage (max) (V)
5.5
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Output Voltage (V)
/
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Accuracy(max)
±25mV
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Maximum Output Current(mA)
±3000
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Iq(mA)
0.8
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Dropout(mV)
/
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PSRR(dB)
/
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Noise(μVRMS)
/
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Temperature Range (°C)
-40 to +125
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Package
DFN3X3-10
