TPM0596

50-V 8-Ch Low-side Driver Array with Shift Register Interface

Data Sheet
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Overview
Development Resources
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Overview

The TPM0596 is a high-voltage, high-current NMOS transistor array with shift register interface. This device consists of eight channels of low-side NMOS transistors with high-voltage outputs and free-wheeling diode for inductive loads.

The maximum drain-current rating of a single NMOS channel is 500 mA. The device supports wide I/O voltage range from 1.8V to 5V. The transistors can be paralleled for higher current capability.

The TPM0596 can replace traditional bipolar Darlington arrays with better thermal efficiency and reliability and saves I/Os.

Status

Production
Rating

Industrial
VIN (V)

5~50
Channel

8
Max Output Current (A)

0.5
Features

Shift Register
Package

TSSOP16

Development Resources

Documentation

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- Data Sheet
- Selection Guide
- Application Note
- Technical Note
- Technical Reference Manual
- Product Brief
- Solution Reference Manual
- User Guide
- Quick Start Guide
- Errata
- Test Report
- Document Name
- Type
- Language
- Date
- Datasheet_TPM0596
  
  Data Sheet
  
  English
  
  02/02/2024
  
  50-V 8-Ch Low-side Driver Array with Shift Register Interface
- Introduction to Latch-up and the Preventive Measures
  
  Technical Note
  
  English
  
  01/19/2024
- Application Tips on ESD-EOS
  
  Technical Note
  
  English
  
  01/19/2024
- 3PEAK Analog Products Selection Guide
  
  Selection Guide
  
  English
  
  01/19/2024